Maxim Integrated Recruitment 2021 | Freshers | Engineer | BE/ ME/ M.Sc

Maxim Integrated Recruitment 2021 | Freshers | Engineer | BE/ B.Tech/ ME/ M.Tech – Electrical/ Electronics/ Instrumentation; M.Sc | 2019/ 2020 Batch | Gandhinagar

Company: Maxim Integrated
Maxim Integrated Recruitment 2021: Maxim Integrated is an American, publicly traded company that designs, manufactures, and sells analog and mixed-signal integrated circuits. Maxim Integrated develops integrated circuits (ICs) for the automotive, industrial, communications, consumer, and computing markets. Headquartered in San Jose, California, the company has design centers, manufacturing facilities, and sales offices throughout the world.

Headquartered in the heart of Silicon Valley with over two billion dollars in sales and more than 7,000 employees, Maxim Integrated is a worldwide leader in designing, manufacturing and selling high-performance semiconductor products.

Company Website: www.maximintegrated.com

Positions: Engineer I – Yield Engineering

Experience: 0-1 year

Job Location: Gandhinagar

Salary: Best In Industry

Education for Maxim Integrated Recruitment 2021:

BE/ B.Tech/ ME/ M.Tech (Electronics/ Electrical/ Instrumentation), MSc (Physics or Electronics) from a reputed institute with minimum of 70% aggregate score.
Work experience in any industrial domain for around 0-1 year.
Work experience in allied domains like LED, Solar and CMOS research/projects will be given preference.

Job Description:
Candidate will be responsible for the following:

Review and compile classification of defects identified during semiconductor manufacturing processes.
Define and maintain relevant defect matrixes for product performance, reliability and yield.
Analyse semiconductor wafer data for patterns and signatures.
Design and maintain SPC charts for excursion detection and control.
Look out for possible excursions during wafer processing.
Real Time analysis of Inline fab data on defects, tool status, commonality and RCA.
Required to be hands-on in day to day review of information, evaluation of defect monitoring strategies and understanding >of defect mechanisms with the mindset of making a difference.
Perform root cause analysis for low yields using various advanced data analysis tools
Statistical and root cause analysis of sort test and parametric test data.
Should be willing to work with flexible timings which can over-lap US/global time zones.
Regular excellent interaction with remote US/global teams for projects and resolving yield issues.
Own product/technology health and disposition of hold material with highest accuracy and within target cycle time.
Identify systematic issues and D0/Cpk opportunity and drive them to fix
Connect failure at PT or wafer sort to inline/defect modes with driving fix
Identify test issues and work closely with test floor/PT for fix

Requirements:

Excellent knowledge of basic science concepts in physics, chemistry and electronics
Good knowledge of CMOS device physics (desirable) and basic electronics
Excellent written and verbal English communication skills
Good knowledge of MS office tools (word, excel and power point)
Knowledge of semiconductor wafer fabrication process (desirable)
Should possess good inter-personal skills
Problem solving and analytical skills
Result-orientation and attention to details
Candidates from Gandhinagar / Ahmedabad preferable.
He/She should be willing to work in flexible timings (including night shifts) and flexible weekday (including Saturday and Sunday) schedule which will depend upon project schedules and deadlines.
Good team player and can smoothly work with cross functional team across the globe